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integer multiplications on IA32 architecture.
post Aug 6 2003, 14:24
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MPEG4 AAC developer

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I am used to working with Assembly Language Programming on the Pentium processor generation( 166 - 200 Mhz MMX). I noticed that for operations like int16 and int32 multiplications / divisions, it used to take as long as 20 clock cycles to complete the an instruction execution. However I noticed that on a Celeron processor, (using the VTune 7.0 evaluation kit from Intel's website) it takes on 1 clock cycle to execute.. Could anyone verify this? In the past, we would use a combination of shift and add operations to implement integer multiplications / divisions.

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post Aug 8 2003, 13:41
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LAME developer

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P6 architecture: pentium pro, pII, PIII, older celerons
Netburst architecture: p4, newer celerons
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