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Dither after adding four PCM 16 bit signals?
Zopfi
post Oct 16 2012, 21:59
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Hello all!

My DSP application is implemented on a FPGA using VHDL. Basically there are four 16-Bit PCM audio signals with 48k sample rate.
After processing each audio signal separately (one multiplication with a factor that depends on a sensor) i add those four audio signals to get a unified signal.
So the question is now, when i add those four audio signals i get a 18 bit result, but i must reduce the bit depth back to 16 bit to hand it to the audio codec chip (DAC).
Should i dither in this case? Or what is the typical approach when adding PCM audio signals and then want to go back to the original bit depth?
All calculation is done in fixed point.

smile.gif

This post has been edited by Zopfi: Oct 16 2012, 22:00
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Martel
post Oct 18 2012, 14:51
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VHDL IS the metal. smile.gif
He has access to all the individual bit "lines" so he can probably just connect those so the former bit 2 becomes bit 0, bit 3 becomes bit 1 etc. and leave former bit 0 and 1 unconnected.

This post has been edited by Martel: Oct 18 2012, 14:54


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