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Dither after adding four PCM 16 bit signals?
Zopfi
post Oct 16 2012, 21:59
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Hello all!

My DSP application is implemented on a FPGA using VHDL. Basically there are four 16-Bit PCM audio signals with 48k sample rate.
After processing each audio signal separately (one multiplication with a factor that depends on a sensor) i add those four audio signals to get a unified signal.
So the question is now, when i add those four audio signals i get a 18 bit result, but i must reduce the bit depth back to 16 bit to hand it to the audio codec chip (DAC).
Should i dither in this case? Or what is the typical approach when adding PCM audio signals and then want to go back to the original bit depth?
All calculation is done in fixed point.

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This post has been edited by Zopfi: Oct 16 2012, 22:00
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pdq
post Oct 17 2012, 19:43
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If you are carrying out calculations to a higher precision than the target bit depth then only dither as part of the final stage of bit depth reduction.
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Arnold B. Kruege...
post Oct 18 2012, 00:25
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QUOTE (pdq @ Oct 17 2012, 14:43) *
If you are carrying out calculations to a higher precision than the target bit depth then only dither as part of the final stage of bit depth reduction.


Yes. This trades register length for less overall processing. If you've got the register length to pull it off, just add the 4 numbers and divide the result by 4 after adding the dither. Depending on how close to the metal you are programming, you can substitute shifting right 2 bits for dividing by 4.
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