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integer multiplications on IA32 architecture.
wkwai
post Aug 6 2003, 14:24
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Hi,


I am used to working with Assembly Language Programming on the Pentium processor generation( 166 - 200 Mhz MMX). I noticed that for operations like int16 and int32 multiplications / divisions, it used to take as long as 20 clock cycles to complete the an instruction execution. However I noticed that on a Celeron processor, (using the VTune 7.0 evaluation kit from Intel's website) it takes on 1 clock cycle to execute.. Could anyone verify this? In the past, we would use a combination of shift and add operations to implement integer multiplications / divisions.


wkwai
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wkwai
post Aug 8 2003, 11:25
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MPEG4 AAC developer


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QUOTE (NumLOCK @ Aug 6 2003, 06:06 AM)
20 cycles seems way out of line. Ensure your mul instruction doesn't fetch its argument from memory.

I think so, in fact there are also penalties in mixing type bytes and int16 with int32 instructions in old Pentium processors. In fact by using the MMX instructions for integer multiplications, the speed up time is about 100 factors.

However on a Celeron system, MMX multiplication instructions only speed things up by about a factor of 4 only.
I think the Celeron, Pentium II and Pentium III are all based on a different architecture.

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